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Published TCIMAIL newest issue No.198
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OFET Device Evaluation of High-Performance S-Shaped Organic Semiconductor “S-DNTT-10”
Features of S-DNTT-10
• High hole mobility > 10 cm2/Vs (Dip-coating method)
• Applicable to both dry and wet processes
• High durability
Various organic transistor materials have been extensively studied to further improve their mobility, air stability and solubility (Figure 1). Under the circumstances, the S-shaped fused ring compound, S-DNTT-10 1), is a new organic semiconductor material developed in 2020. It possesses excellent features such as high mobility of 11 cm2/Vs, air stability, and approximately 30 times higher solubility compared with that of the linear structure isomer, C10-DNTT4). In addition, S-DNTT-10 also has good thermal stability, so that it can be handled in both wet and vacuum device fabrication processes (Table 1).
Figure1. Typical organic transistor materials (small molecule p-type semiconductors)
Figure２. Chemical structures of S-DNTT-n
Table１. Summary of physical property data1)
TCI has commercialized an excellent p-type semiconductor material, S-DNTT-10 [product number: D5796]. We have begun fabrication and evaluation of OFET devices in our laboratory. Please see below for the details.
OFET performance evaluation of S-DNTT-n
1. OFET device evaluation using dip-coating method
Figure3. OFET device fabrication method and device configuration
Device fabrication procedure
Semiconductor layers (thickness = 30−50 nm) of S-DNTT-n (n = 4, 6, 8, 10) were formed on bare Si/SiO2 substrates (SiO2: 200 nm) by dip-coating method (pulling rate: 4 μm/sec) from their toluene solutions (1.0 g/L, 50 °C) under a nitrogen atmosphere. The top-contact type OFETs were completed by depositing gold (thickness = 40 nm) as source and drain electrodes (Figure 3).
Device performance
Performance of the OFET devices are summarized in Table 2. All S-DNTT-n (n = 4, 6, 8, 10) exhibited typical p-type semiconductor characteristics. The mobilities of S-DNTT-n are strongly dependent on their alkyl chain lengths. The S-DNTT-10-based OFET device showed the highest transport performance with a mobility of 11 cm2/Vs (Figure 4a). In addition, we have conducted cycle measurement as a durability test using the S-DNTT-10-based device. Even after a series of 100 cycles, the device maintained its stable transistor operation, indicating almost no performance deterioration (Figure 4b). We have demonstrated that S-DNTT-10 is an excellent semiconductor material which possesses both good air stability and durability.
Table2. Characteristics of dip-coated OFETs based on S-DNTT-n1)
Figure4. Performance of dip-coated OFETs based on S-DNTT-101)
(a) Transfer curves (b) Cycle measurement under air
2. OFET device evaluation using vacuum deposition method
Figure5. OFET device fabrication method and device configuration
Device fabrication procedure
Semiconductor layers (thickness = 50−100 nm) of S-DNTT-n (n = 4, 6, 8, 10) were formed on bare Si/SiO2 substrates (Si/SiO2: 200 nm) at room temperature by vacuum deposition method. The top-contact type OFETs were completed by depositing gold (thickness = 40 nm) as source and drain electrodes (Figure 5).
Device performance
Performance of the OFET devices are summarized in Table 3. All S-DNTT-n (n = 4, 6, 8, 10) exhibited typical p-type semiconductor characteristics. The obvious improvement of transistor performance was observed in each S-DNTT-n-based device by post-annealing treatment (Table 3). In addition, the mobilities of S-DNTT-n are strongly dependent on their alkyl chain lengths. The S-DNTT-10-based OFET device showed the highest transport performance with a mobility of 3.5 cm2/Vs (Table 3 and Figure 6).
Table3. Characteristics of vacuum-deposited OFETs based on S-DNTT-n1)
aPost-annealing temperature.
Figure6. Performance of vacuum-deposited OFETs based on S-DNTT-101)
(a) Transfer curves (b) Output curves
S-DNTT-10 has a product specification for the hole mobility of > 3.0 cm2/Vs (vacuum deposition method, bare substrate) on OFET devices.
This product is commercialized in collaboration with Yasuda Laboratory at Kyusyu University and Ushio-Chemix Corporation.
References
- 1) Y. Yamaguchi, Y. Kojiguchi, S. Kawata, T. Mori, K. Okamoto, M. Tsutsui, T. Koganezawa, H. Katagiri, T. Yasuda, Chem. Mater. 2020, 32, 5350.
- 2) Y.-Y. Lin, D. J. Gundlach, S. F. Nelson, T. N Jackson, IEEE Electron Device Letters, 1997, 18, 606.
- 3) T. Yamamoto, K. Takimiya, J. Am. Chem. Soc. 2007, 129, 8, 2224.
- 4) M. J. Kang, I. Doi, H. Mori, E. Miyazaki, K. Takimiya, M. Ikeda, H. Kuwabara, Adv. Mater. 2011, 23, 1222.
- 5) K. Nakayama, Y. Hirose, J. Soeda, M. Yoshizumi, T. Uemura, M. Uno, W. Li, N. J. Kang, M. Yamagishi, Y. Okada, E. Miyazaki, Y. Nakazawa, A.Nakao, K. Takimiya, J. Takeya, Adv. Mater. 2011, 23, 1626.
- 6) K.Takimiya, I. Osaka, T. Mori, M. Nakano, Acc. Chem. Res. 2014, 47, 1493.
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“Material purity” is an important factor directly influencing OFET device parameters. To check and enhance the quality and purity of the transistor materials, TCI has recently begun the fabrication and evaluation of the OFET devices using our products. We always seek to improve our technology and skill in order to provide high-purity and quality materials.